Noah Gaertner
ECE Senior @ CMU
7 years of experience
noah@noahgaertner.tech
Blog: noahgaertner.tech/blog
Carnegie Mellon BS/MS ECE Class of May 2024 (IMB)
Hi, I’m Noah Gaertner, a Senior in Electrical and Computer Engineering at Carnegie Mellon. I'm primarily interested in Microarchitecture and Digital Design, with secondary focuses in Computer Architecture and VLSI Design.
Skills:
Experience
Carnegie Mellon University Department of Electrical and Computer Engineering ece.cmu.edu
Teaching Assistant: 18-220 Electronic Devices and Integrated Circuits Pittsburgh, PA
Helped students learn electronic devices and analog circuits. Administered lab assignments and exams. Graded exams and homework. Did QC for exams.
Intel intel.com
SoC Design intern Hillsboro, OR
Designed and implemented digital component of next-generation clock generator prototype IP and taped out in silicon on highly accelerated timeline. Brought existing clock generator IP up to modern standards for code, including compliance upgrades for static checks.
Carnegie Mellon University ece.cmu.edu
Teaching Assistant: 18-320 Microelectronic Circuits Pittsburgh, PA
Ran labs, office hours, and recitations, graded homework, and did course development.
KBR kbr.com
Riscure AES Intern Beavercreek, OH
Used ChipWhisperer platform to determine the viability of power analysis on an AES ASIC designed to be resistant to side-channel analysis.
Education
Carnegie Mellon University ece.cmu.edu
Bachelor's & Master's, Electrical and Computer Engineering
Activities and Societies: IEEE (Internal Relations Chair), Undergraduate Student Senate (Member at Large, Finance Committee), Society for Hispanic Professional Engineers, Robotics Club
Junior Electrical and Computer Engineering Student @ CMU, Planning on getting a 4th-year master's. Focus on VLSI design and computer architecture, with some additional emphasis placed on low-level software design and implementation.
Pine View School
Diploma, High School
Projects
C0VM
Implemented part of a fully functional interpreter for C0 (A cut-down version of C) by defining virtual machine behavior when executing bytecode generated by a provided portion of the program.
Malloc Lab
Designed and implemented a functional memory allocator (malloc) implementation for the C Programming Language.
ECHO: ChaCha20 Accelerator + RISC-V Core Tapeout
Designed, verified, and implemented a ChaCha20 accelerator that was then attached as a RoCC (RISC-V custom instruction/L1 cache DMA) accelerator to a Rocket RISC-V core through Berkeley Architecture Research’s Chipyard platform, then ran the design through a full tapeout flow to be fabbed over the summer on the Intel16 process and tested in F23.
Hardware Neural Nets
Implemented several small neural nets entirely in hardware to simulate basic functions
Certificates
RECF Pre-Engineering Industry Certification
Successfully completed 150 hours of education and training and passed the Robotics Education & Competition Foundation Certification in preparation for seeking higher education in the field of engineering and to demonstrate the basic skills for job entry positions which emphasize areas of Pre-Engineering. Credential ID 5X9Q48ESEH
RECF Robotics Industry Certification
Successfully completed 150 hours of education and training and passed the Robotics Education & Competition Foundation Certification in preparation for seeking higher education in the field of engineering and to demonstrate the basic skills for job entry positions which emphasize areas of Robotics. Credential ID 5X9Q48ESEH
Autodesk
The Autodesk Inventor Certified User Certification confirms students have developed the digital design skills needed to effectively use Autodesk Inventor software. Knowledge demonstrated includes creating, modifying, formatting, and sharing 2D sketches, creating parts, viewing, and animating assemblies, creating presentations and drawings, etc. Credential ID vwCx-s279